Grid test fixtures, also commonly known as "grid translator fixtures," are used in conjunction with automated, computer-based testing equipment to test and verify the functioning of both bare printed circuit boards and loaded boards. The testing routines ensure that the boards are electrically and physically correct, and that they meet specifications. Comprehensive board testing is necessary since loading complex and expensive components onto a partially tested or defective bare board can be very costly. For bare circuit boards the goal of the board testing and verification process is 100% fault coverage in the electrical network or net list. Since one side of a board usually has a different array of electrical contacts from the other side of the board, both sides of a bare board must be tested. Loaded circuit boards, on the other hand, do not require 100% fault testing of the net since the bare board should have already been tested, and the components that are loaded onto the board also will have been tested. However, loaded boards do require that a significant testing routing be followed to ensure compliance with standards for the board and that, for instance, all soldering has been done to specification.
The test fixtures of interest in the present invention are adapted to test both bare boards and boards that have been loaded with electrical and/or electronic components. But regardless of whether a bare or loaded board is being tested, the test fixture serves as a structural framework that facilitates the establishment of an electrical connection between test points on the circuit board being tested on the one hand, and the testing equipment on the other hand. This is done by electrically interfacing the test equipment with test points on the board through a plurality of test pins that probe specific contacts on the board, one test probe for each test point. The "test points" thus are the electrical contacts, via holes or plated through holes on a bare circuit board that require testing, or the contacts found on a board that has been loaded with components and which require testing.
As is standard in the industry, the test points on a circuit board are irregularly arranged and spaced, depending upon such factors as the physical size of the board, and the type, number and spacing of components that are to be used with the board. In contrast, the test equipment used to test the boards has test contacts arranged in a regular grid array. The spacing of the test contacts in the grid array varies according to the manufacturer and model of the test equipment. Regardless of the spacing of the regularly spaced test contacts in the grid array, the test fixture therefore serves to "translate" the irregular array of test points on the circuit board into the regular grid array of the test equipment.
The number of points to be tested on any given circuit board can be quite large, numbering in the thousands. During the testing process an electrical connection is made between the each test point on the board under test and the test equipment. The test equipment transfers signals through switched circuits to selected and predetermined test points or circuits on the circuit board that is being tested, and a pass, no pass result is obtained. In this way the proper functioning of the entire net of circuits on a board--the so-called net list--can be checked and verified. Faults in the board are also readily identified.
Grid test fixtures are uniquely designed for each specific board design. The test fixture typically includes a top plate and a bottom plate and series of parallel, spaced apart guide plates arranged in a stacked fashion between the top and bottom plates. Each plate in the test fixture has a plurality of test probe holes drilled through it in a predetermined array pattern that corresponds to the array pattern of test points on the circuit board to be tested. Again, the pattern or array of test points varies widely from board to board. For instance, one board might have tens of thousands of test points that are entirely or partially grid-oriented. Another board might be adapted for an entirely different set of components with only several hundred test points spaced irregularly around the board.
The center-to-center distance between test points in a given component is referred to as "pitch." With some integrated circuit (IC) components the pitch is very fine. As an example, in some component packages such as ball grid array (BGA) packages and chip scale packages (CSP)--package referring to the I/O packaging for the die--the pitch may be less than 1 millimeter, and down to 0.2 mm. A bare board adapted for utilizing such a package has a component mounting location with connecting holes (i.e., vias) having the same pitch. The "density" of a package or a board refers to the number of test points per unit area in the package, or the component mounting location on the board. Current densities may be up to 900 test points in an area of 35 mm.sup.2 for some IC packages, and the density of packages is constantly increasing. The pattern of test points in either a bare board as a whole, a component mounting location on a bare board, or in a single component is referred to herein as the "image pattern." The image pattern is specific to the board under test or to a component. Since there are many, many different components, and of those, many different pitches and densities, the image pattern varies according to the specific component or component mounting location on a board.
In contrast to the variable image pattern of test points on the board under test, the test equipment, as noted, has a regularly arranged grid pattern of test contacts. This regular grid pattern is a result of various factors, including the fact that spring probe connections are used to interface the test machine contacts to test probes in the test fixture, and these introduce certain physical limitations on contact spacing. In addition, since the electrical connections on switch cards have certain standard dimensions, these limitations also effect the spacing of contacts on the test machine. Due to these and other factors, on most commercially available test equipment the test contacts or connecting points are provided in, for instance, a regular grid having ten contacts per inch, one hundred test contacts per square inch. Some test equipment has been built with up to double this number of test points per inch, but no equipment has a grid pattern density that approaches the density and pitch of, for example, BGA and CSP packages. Thus, the distance between adjacent test contacts found on the test equipment is nearly always greater than the pitch of components to be tested.
The test fixture facilitates an electrical interface between the test points in the image pattern of the board under test, and the regular "grid pattern" of the test contacts of the test equipment. This interface is accomplished with test probes, also called "test pins" or "translator pins," that extend through the test probe holes drilled through the plates in the test fixture. The test probes are used to establish electrical contact between the test points on the circuit board on one side of the test fixture, and associated switches interconnecting the probes to the test equipment on the opposite side of the test fixture. Standard test probes are around 33/4 inches in length. The diameter of the probes varies according to the type and size of the test point that the probe will contact. The test probes extend completely through the test fixture. One end of the probes is connected to the test equipment and the other end probes a test point on the board under test. In this way an electrical connection may be made with the test probe making contact with a test point on the board on one side of the fixture, and a corresponding test point on the test machine on the other side of the fixture.
Because the image pattern is different from the grid pattern, translation of the image pattern requires that many of the test probes are oriented in the test fixture at oblique angles relative to the plane of the test fixture. This is referred to as test probe tilt or lean. The test probe holes drilled through any one plate in the test fixture thus will be in a slightly different position from the corresponding test probe holes drilled through the next adjacent plate.
Given the many thousands of test probes that may be included in a test fixture, the positioning of the test probe holes drilled through the plates must be precisely controlled. But as IC packaging gets smaller, and as pitch distances get smaller and test point density increases, limitations in standard test fixtures become apparent. For instance, translating the image pattern from a single CSP or BGA mounting location to the grid pattern requires that a test probe for each test point in the image pattern be translated to the grid pattern, with its standard ten points per inch spacing. This requires complex physical spacing of the test probes within the test fixture. The test probe holes drilled through each successive plate in the test fixture must be precisely controlled since if the probes are in electrical contact with one another, errors will be introduced into the testing regimen. Further, since the test probes are manually loaded into the test fixture, loading becomes increasingly difficult. Since test probes are of standard length, the pin tilt angle is very limited. And finally, when the pitch of an IC package decreases below a certain point it becomes physically impossible to translate with standard test fixtures all of the test points on the component to the grid pattern of the test machine.
As is evident from the foregoing discussion, a major consideration to be addressed in designing a test fixture is translating the image pattern of the board under test to the grid pattern of the test equipment. When a board has many components such as BGA, CSP and other packages, and those components are tightly packed onto the board, the problem becomes how to accomplish this translation.
Various solutions to the problems of testing increasingly miniaturized IC packages with higher densities have been proposed and tried. For instance, one solution is to build multiple test fixtures for testing different components or net lists of the same board. Since most boards have multiple IC components, and of those, many are different from one another (for instance, BGA, CSP, etc), multiple traditional test fixtures are built, with each different fixture intended to test a specific portion of the net list in the board. This solution has several problems. First, it is impossible to obtain a truly 100% fault coverage test since it is possible for there to be open and short circuits in the board that are not tested and which go undetected. In other words, regardless of how the testing is carried out, unless all test points on the entire board are tested with a single fixture and single test cycle, it is possible for there to be undetected faulty circuits. Further, building multiple fixtures is expensive, labor intensive and time consuming.
Another solution is to increase the length of the test probes to increase the degree of angular deflection that the probes may be held in the test fixtures. While this allows translation of higher density test points, there still is a limit to the density and pitch that may be translated in this manner. In addition, as the degree of pin tilt increases, there is a greater chance of poor electrical connections with the test machine interconnects. This introduces opportunity for error. There are also substantial physical limitations placed on circuit board designers in the placement of components relative to one another that affect the test fixture that will be designed to test the board.
One further solution is to assemble a sub-test fixture to test a specific component or a portion of a board outside of the test fixture itself. Such a separate sub-test fixture uses a plurality of wires to interconnect each point of the circuit under test into the grid pattern. This solution has many obvious limitations, the most major of which is the limitation described above relative to the inability to test the entire board under test at one time in one cycle. There are other limitations with sub-test fixtures as well, including the fact that it is very difficult to insure the correct electrical connections are made between the test points and the correct associated test point on the test machine when many hundreds of wires are used.
Yet another solution to the problem of translating the image pattern into the grid pattern of test machines is described in U.S. Pat. No. 5,399,982. This invention relies upon a flexible adapter foil that is used in a test fixture and carries on the side facing the grid pattern regularly arranged leads, and on the side facing the component under test leads that are directly in electrical contact with the test points of the component. The mutually assigned leads are electrically interconnected on both sides of the flexible adapter by plated-through holes and, if needed, associated printed conductors.
Despite the improvements made to test fixtures there remains a need for test fixtures that can interface all test points on a board, regardless of the components used on the board and regardless of the density and pitch of the test points.
The present invention approaches the problems associated with translating the image pattern of a board under test--or portions of it--to the grid pattern of the test equipment in a new manner, with a universal grid interface (UGI). The UGI of the present invention is often used as a part of a standard test fixture that uses traditional test probes. However, the UGI is utilized where component spacing or density or other limitations dictates that traditional test probe techniques cannot be used, for instance where multiple CSP or BGA packages are oriented adjacent one another on the board. The UGI allows one or more new grid patterns to be placed within the existing test fixture independent of the grid pattern of the test machine.
The UGI uses test probes that are generally arranged in the test fixture in the image pattern, and which generally do not vary from that pattern. These test probes extend into the test fixture in the image pattern and, in one aspect of the invention, are electrically interfaced with associated test points in the test machine through the use of a flexible circuit interconnect that has a pad having electrical contacts that are arranged in the image pattern on one end. Such flexible circuit interconnect material is commonly called "flex." The test probes make electrical contact with the associated contacts on the pad of the flex. The flex may be folded onto itself and threaded in a ribbon-like manner through other test probes in the test fixture and extended to a location outside of the fixture or image of the board. Since the flex is electrically shielded, the flex may make physical contact with other test probes in the fixture without interfering with test signals. The electrical leads or traces in the flex may then be translated into the grid pattern of the test machine at the opposite end of the flex. The use of flex thus allows the electrical test points of the board to be interfaced with the test machine without physically interfering with other test probes in the test fixture.
The UGI may be used in test fixtures that are otherwise conventional, but which include components such as CSP or BGA packages that cannot be translated with conventional fixtures. Multiple UGI assemblies may be used in the same text fixture. In addition, a UGI according to the present invention may be used with a specific component in whatever type of board in which the component is used. In other words, and by way of example, each specific CSP or a CSP having the same pitch will have a unique pattern of test points, or image pattern. That particular CSP or a CSP having the same pitch might be used in many different circuit boards. A UGI built for that specific CSP or other component having the same pitch could be used with a test fixture built for many different circuit boards. Furthermore, the UGI may be used with any component having the pitch of the UGI. For example, there are many components that have a pitch of 0.3 mm. A UGI built for a 0.3 mm. pitch may be used with any component having that pitch, regardless of the specific image pattern used in that component. A UGI is thus "universal" to the CSP or other packages having the same pitch for which it is built.